Deep N wells in triple well structures and method for...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned

Reexamination Certificate

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C438S245000, C438S282000, C438S300000, C438S302000

Reexamination Certificate

active

07052966

ABSTRACT:
A disclosed method for fabricating a structure in a semiconductor die comprises steps of implanting a deep N well in a substrate, depositing an epitaxial layer over the substrate, and forming a P well and a lateral isolation N well over the deep N well, wherein the lateral isolation N well and the P well are fabricated in the substrate and the epitaxial layer, and wherein the lateral isolation N well laterally surrounds the P well, and wherein the deep N well and the lateral isolation N well electrically isolate the P well. Implanting a deep N well can comprise steps of depositing a screen oxide layer over the substrate, forming a mask over the screen oxide layer, implanting the deep N well in the substrate, removing the mask, and removing the screen oxide layer. Depositing the epitaxial layer can comprise depositing a single crystal silicon over the substrate.

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patent: 6617647 (2003-09-01), Yamazaki
patent: 6822296 (2004-11-01), Wang

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