Decoupling capacitor assignment technique with respect to...

Details Decoupling capacitor assignment technique with respect to... Decoupling capacitor assignment technique with respect to...

2001-11-29

2003-10-28

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

06640331

ABSTRACT:

BACKGROUND OF INVENTION
A typical computer system has at least a microprocessor and memory. The microprocessor processes, i.e., executes, instructions to accomplish various tasks of the computer system. Such instructions, along with the data required by the microprocessor when executing these instructions, are stored in some form of memory.
FIG. 1
shows a typical computer system having a microprocessor (
10
) and some form of memory (
12
). The microprocessor (
10
) has, among other components, a central processing unit (also known and referred to as “CPU” or “execution unit”) (
14
) and a memory controller (also known as “load/store unit”) (
16
). The CPU (
14
) is where the actual arithmetic and logical operations of the computer system take place. To facilitate the execution of operations by the CPU (
14
), the memory controller (
16
) provides the CPU (
14
) with necessary instructions and data from the memory (
12
). The memory controller (
16
) also stores information generated by the CPU (
14
) into the memory (
12
).
The operations that occur in a computer system, such as the logical operations in the CPU and the transfer of data between the CPU and memory, require power. If the components responsible for carrying out specific operations do not receive adequate power in a timely manner, computer system performance is susceptible to degradation. As an added challenge, power consumption of modern computers has increased as a consequence of increased operating frequencies. Thus, providing power to the components in a computer system in a sufficient and timely manner has become an issue of significant importance.
Often, power supply to a particular computer system element varies, which, in turn, effects the integrity of the element's output. Typically, this power variation results from the distance between a power supply for the element and the element itself. This distance may lead to the element not receiving power (via current) at the exact time it is required.
As shown in
FIG. 2
, one approach used by designers to combat this performance-inhibiting behavior is introducing decoupling capacitance (also referred to as “decap”) to a particular circuit by positioning one or more decoupling capacitors (
13
) close to elements (
15
) in an integrated circuit (
17
). These decoupling capacitors (
13
) store charge from the power supply and distribute the charge to the elements (
15
) when needed. For example, if power received by a element from a power supply line (
19
) attenuates, one or more decoupling capacitors (
13
) will distribute charge to the element (
15
) to ensure that the element (
15
) is not affected by the power variation on the power supply line (
19
). In essence, a decoupling capacitor acts as a local power supply for one or more specific elements in a computer system.
However, important considerations must be made as to the assignment of one or more decoupling capacitors to particular capacitance needing elements because capacitors have particular undesirable characteristics. One such characteristic pertains to two types of capacitors: thin-oxide capacitors and thick-oxide capacitors. A thin-oxide capacitor is designed using one or more transistors that have thin gate dielectric thicknesses, and although thin-oxide capacitors provide a relatively large amount of decoupling capacitance, they are prone to undesirable gate-tunneling leakage currents. Such leakage current, in turn, increases the leakage power of a circuit, resulting in increased power and heat dissipation by the circuit. Alternatively, a thick-oxide capacitor is designed using one or more transistors that have thick gate dielectric thicknesses, and although thick-oxide capacitors have less leakage currents, they provide a small amount of decoupling capacitance relative to thin-oxide capacitors. Thus, there is a need for a technique that assigns decoupling capacitors such that decoupling capacitance on an integrated circuit is increased while leakage power constraints are met.
SUMMARY OF INVENTION
According to one aspect of the present invention, a method for assigning decoupling capacitors on an integrated circuit having a plurality of drivers and a leakage power constraint comprises determining a plurality of decoupling capacitance need to available decoupling capacitance ratios for the plurality of drivers; selecting a high ratio from the plurality of ratios, where the high ratio is associated with a decoupling capacitor; determining whether a total leakage power would be greater than the leakage power constraint were the decoupling capacitor replaced with a thin-oxide decoupling capacitor; and replacing the decoupling capacitor with the thin-oxide decoupling capacitor if the total leakage power would not be greater than the leakage power constraint.
According to another aspect, a computer system comprises a processor, a memory, and instructions, residing in the memory and executable in the processor, for determining a plurality of decoupling capacitance need to available decoupling capacitance ratios for a plurality of drivers; and using the plurality of ratios to increase an amount of decoupling capacitance by replacing a decoupling capacitor with a thin-oxide decoupling capacitor without violating a leakage power constraint of the integrated circuit.
According to another aspect, a computer-readable medium having recorded therein instructions executable by processing, where the instructions are for: determining a plurality of decoupling capacitance need to available decoupling capacitance ratios for a plurality of drivers on an integrated circuit; selecting a high ratio from the plurality of ratios, where the high ratio is associated with a decoupling capacitor; determining whether a total leakage power would be greater than a leakage power constraint were the decoupling capacitor replaced with a thin-oxide decoupling capacitor; and replacing the decoupling capacitor with the thin-oxide decoupling capacitor if the total leakage power would not be greater than the leakage power constraint.
According to another aspect, a method for assigning decoupling capacitors on an integrated circuit having a plurality of drivers and a leakage power constraint comprises determining a plurality of available decoupling capacitance to decoupling capacitance need ratios for the plurality of drivers; selecting a low ratio from the plurality of ratios, where the low ratio is associated with a decoupling capacitor; determining whether a total leakage power would be greater than the leakage power constraint were the decoupling capacitor replaced with a thin-oxide decoupling capacitor; and if the total leakage power would not be greater than the leakage power constraint, replacing the decoupling capacitor with the thin-oxide decoupling capacitor.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.


REFERENCES:
patent: 3813650 (1974-05-01), Hunter
patent: 4827428 (1989-05-01), Dunlop et al.
patent: 5847969 (1998-12-01), Miller et al.
patent: 5938755 (1999-08-01), Yastrow
patent: 5963728 (1999-10-01), Hathaway et al.
patent: 5978880 (1999-11-01), Bruce et al.
patent: 5999714 (1999-12-01), Conn et al.
patent: 6086628 (2000-07-01), Dave et al.
patent: 6163049 (2000-12-01), Bui
patent: 6484302 (2002-11-01), Freymuth
patent: 2001/0047507 (2001-11-01), Pileggi et al.
patent: 2002/0112220 (2002-08-01), Miller
patent: 07098727 (1995-04-01), None
patent: 08272836 (1996-10-01), None
patent: 2000020565 (2000-01-01), None
Chang et al., “Design techniques for a low-power low-cost CMOS A/D converter”, IEEE Journal of Solid-State Circuits, vol. 33, Aug. 1998, pp. 1244-1248.*
NB9306505, “LSI Low Power Oriented Layout Method with Net Switching”, IBM Technical Disclosure Bulletin, vol. 36, No. 6B, Jun. 1993, pp. 505-508 (4 pages).

Affiliated with

Also associated with

Rating

Decoupling capacitor assignment technique with respect to... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Decoupling capacitor assignment technique with respect to..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Decoupling capacitor assignment technique with respect to... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3161568