Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-03-28
2009-12-15
Baderman, Scott T (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S792000, C714S794000
Reexamination Certificate
active
07634714
ABSTRACT:
A decoding system for eight-to-fourteen modulation or eight-to-sixteen modulation (EFM/ESM), which has an analog to digital converter (ADC), an adaptive equalizer and a Viterbi decoder. The ADC receives an analog signal with an EFM or ESM feature, and converts the analog signal into a digital signal with the EFM or ESM feature. The adaptive equalizer converts the EFM or ESM digital signal into a first signal with a minimum phase feature. The Viterbi decoder receives the first signal and generates a decoding signal in accordance with a Viterbi algorithm and a channel model, and the Viterbi decoder discards nonexistent paths in accordance with the EFM or ESM feature when computing branch metric of a branch or a node.
REFERENCES:
patent: 5764024 (1998-06-01), Wilson
patent: 7129794 (2006-10-01), Lin
patent: 7178093 (2007-02-01), Chen et al.
Alphonse Fritz
Bacon & Thomas PLLC
Baderman Scott T
Sunext Technology Co., Ltd.
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