Static information storage and retrieval – Read/write circuit – Precharge
Patent
1978-11-28
1980-01-22
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Precharge
307238, 365182, 365204, G11C 1140
Patent
active
041853202
ABSTRACT:
Disclosed herein is a decoder circuit including: a charge up transistor for maintaining the content of input address signals; a power supply switching transistor for controlling a charge up current which is supplied to the charge up transistor; a predetermined number of selection transistors which are connected at a connection node between the charge up transistor and the power supply switching transistor for selecting an output word line, and; a bootstrap transistor which is connected at an opposide side of the connection node with respect to the charge up transistor. The characteristic feature of the present invention is the provision of a charge compensation transistor which is connected at a connection node between the charge up transistor and the power supply switching transistor so as to compensate for the charges of the charge up transistor.
REFERENCES:
patent: 4051388 (1977-09-01), Inukai
Nakano Masao
Takemae Yoshihiro
Fears Terrell W.
Fujitsu Limited
LandOfFree
Decoder circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Decoder circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Decoder circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-337239