Decoder circuit

Static information storage and retrieval – Read/write circuit – Precharge

Patent

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Details

307238, 365182, 365204, G11C 1140

Patent

active

041853202

ABSTRACT:
Disclosed herein is a decoder circuit including: a charge up transistor for maintaining the content of input address signals; a power supply switching transistor for controlling a charge up current which is supplied to the charge up transistor; a predetermined number of selection transistors which are connected at a connection node between the charge up transistor and the power supply switching transistor for selecting an output word line, and; a bootstrap transistor which is connected at an opposide side of the connection node with respect to the charge up transistor. The characteristic feature of the present invention is the provision of a charge compensation transistor which is connected at a connection node between the charge up transistor and the power supply switching transistor so as to compensate for the charges of the charge up transistor.

REFERENCES:
patent: 4051388 (1977-09-01), Inukai

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