Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-07-29
1999-09-21
Chung, Phung M.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714 22, G01R 3130, G06F 1100
Patent
active
059548339
ABSTRACT:
For use in a module, a redundancy detection circuit for, and method of, determining whether a predetermined adequate redundancy exists when the module is present in a system. In one embodiment, the module includes: (1) a sensor, associated with the module, that receives a signal that is a function of a number of modules present in the system and (2) a calculation circuit, coupled to the sensor, that determines from the signal whether a surplus capacity of the module provides at least the predetermined adequate redundancy for the system.
REFERENCES:
patent: 5745356 (1998-04-01), Tassitino, Jr. et al.
patent: 5802859 (1998-09-01), Zugibe
Garcia Richard R.
Suranyi Gabriel G.
Chung Phung M.
Lucent Technologies - Inc.
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