Debug circuit and a method of debugging

Details Debug circuit and a method of debugging Debug circuit and a method of debugging

2011-03-01

2011-03-01

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S704000

Reexamination Certificate

active

07900113

ABSTRACT:
A debug circuit for a multi-mode circuit driven by a clock signal, with an input for a clock signal, and a debug signal generator arranged to generate for each of a subset of the modes of the multi-mode circuit a corresponding debug signal based on a clock signal provided at the input. The frequency of debug signals is dependent on the frequency of a clock signal provided at the input, and each debug signal selects its respective mode for a length of time longer than that of each other mode of the multi-mode circuit, or each debug signal selects its respective mode for a length of time shorter than that of each other mode of the multi-mode circuit.

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patent: WO 01/24008 (2001-04-01), None
patent: WO 2007/132015 (2007-11-01), None

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