Data transmitting/receiving device of a multiprocessor system an

Details Data transmitting/receiving device of a multiprocessor system an Data transmitting/receiving device of a multiprocessor system an

1997-06-25

1999-09-28

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710128, 710107, 710 40, G06F 1300

Patent

active

059580313

ABSTRACT:
A data transmitting/receiving device and method for transmitting and receiving data between processors in a multiprocessor system. A data bus interconnecting a plurality of processors is separated into sub-buses, with each sub-bus associated with a separate processor. This architecture serves to increase bus occupation efficiency and thereby improve system performance, and it allows DPRAMs to be replaced with SRAMs to reduce the production cost of the system.

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