Data transmission circuit having common input/output lines

Static information storage and retrieval – Read/write circuit

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36523003, 365154, G11C 700

Patent

active

053413318

ABSTRACT:
A data transmission circuit of a semiconductor integrated circuit capable of achieving high integration and high-speed operation is disclosed. A data input/output line is constructed as a pair of common input/output lines 71 and 72, and input transistors 77 and 78 are constructed as a pair. The potential of the bit lines are not transferred to the input/output lines 71 and 72 through the channels of output transistors 75 and 76, but transferred to control terminals of the output transistors 75 and 76 coupled to the input/output lines 71 and 72, to thus access predetermined data through the sensing operation of the output transistors 75 and 76. Therefore, the data input/output can be performed at high speed, and its construction is compact, thereby improving the degree of integration of a semiconductor integrated circuit.

REFERENCES:
patent: 4984202 (1991-01-01), Kawahara et al.
patent: 5051954 (1991-09-01), Toda et al.
patent: 5274595 (1993-12-01), Seok et al.
patent: 5283760 (1994-02-01), Chin et al.
Nakagome et al., "A 1.5V Circuit Technology for 64Mb DRAMs", 1990 Symposium on VLSI Circuits, pp. 17-18.

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