Data transfer device and method thereof

Details Data transfer device and method thereof Data transfer device and method thereof

2011-07-19

2011-07-19

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S030000, C714S744000, C713S500000

Reexamination Certificate

active

07984351

ABSTRACT:
A data transfer device transfers data between two clock domains of a data processing device when the data processing device is in a test mode. The data transfer device receives clock signals associated with each clock domain. To transfer data from a first clock domain to a second clock domain the data transfer device identifies transitions of clock signals associated with each clock domain that are sufficiently remote from each other so that data can deterministically be provided by one clock domain and sampled by the other. This ensures that data can be transferred between the clock domains deterministically even when the phase relationship between the clock signals is indeterminate.

REFERENCES:
patent: 7174473 (2007-02-01), Musumeci et al.
patent: 2001/0033629 (2001-10-01), Ito
Josef Schmid Joachim Knäblein, Advanced Ynchronous Scan Test Methodology for Multi Clock Domain ASIC, Aug. 6, 2002.

Affiliated with

Also associated with

Rating

Data transfer device and method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data transfer device and method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data transfer device and method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2634903