Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-08-22
2006-08-22
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S400000, C713S401000, C713S501000, C713S600000, C710S305000, C710S309000, C710S310000, C710S313000
Reexamination Certificate
active
07096375
ABSTRACT:
A circuit for data transfer includes a first buffer operating at a first clock frequency, a plurality of second buffers operating at a second clock frequency, and a selector circuit which receives data at the first clock frequency, and supplies the data to a selected one of the first buffer and the second buffers.
REFERENCES:
patent: 4926423 (1990-05-01), Zukowski
patent: 5151995 (1992-09-01), Garcia
patent: 5341370 (1994-08-01), Nuhn et al.
patent: 5343435 (1994-08-01), Bourekas et al.
patent: 5764966 (1998-06-01), Mote, Jr.
patent: 5841722 (1998-11-01), Willenz
patent: 5892979 (1999-04-01), Shiraki et al.
patent: 5915128 (1999-06-01), Bauman et al.
patent: 5968180 (1999-10-01), Baco
patent: 6055597 (2000-04-01), Houg
patent: 6092129 (2000-07-01), Smith et al.
patent: 6115760 (2000-09-01), Lo et al.
patent: 6192395 (2001-02-01), Lerner et al.
patent: 6256687 (2001-07-01), Ellis et al.
patent: 6425088 (2002-07-01), Yasukawa et al.
patent: 6449655 (2002-09-01), Hann et al.
patent: 6516420 (2003-02-01), Audityan et al.
patent: 6640275 (2003-10-01), Kincaid
patent: 6724850 (2004-04-01), Hartwell
patent: 6765932 (2004-07-01), Santahuhta
patent: 6775755 (2004-08-01), Manning
patent: 6907538 (2005-06-01), Boutaud
patent: 6920578 (2005-07-01), Thompson et al.
patent: 2003/0056137 (2003-03-01), Huelskamp
patent: 2003/0086503 (2003-05-01), Rennert et al.
patent: 0 546 507 (1993-06-01), None
patent: 04047731 (1992-02-01), None
Hirose Yoshio
Okano Hiroshi
Wakayama Shigetoshi
Arent & Fox PLLC
Browne Lynne H.
Fujitsu Limited
Patel Nitin C.
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