Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-09-06
2005-09-06
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S230080, C365S230020
Reexamination Certificate
active
06940760
ABSTRACT:
A circuit arrangement and method are used in connection with a data latch that is coupled to a data source over a source synchronous communications interface to disable the data latch from latching data whenever the data source is not driving the source synchronous data strobe signal. As such, when the data source is not driving the source synchronous data strobe signal, undesired and/or inadvertent latching by the data latch can be avoided. Moreover, in implementations where a data strobe signal line is bidirectional, and capable of being driven either by the data source or by another circuit used to access the data source (e.g., a memory controller), disabling data latching as described herein can minimize the risk of driver damage resulting from conflicting attempts to drive the data strobe signal line at both ends.
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Borkenhagen John Michael
Greenfield Todd Alan
Marcella James Anthony
Nguyen Tuan T.
Phung Anh
Wood Herron & Evans LLP
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