Data strobe clock buffer in semiconductor memory apparatus,...

Details Data strobe clock buffer in semiconductor memory apparatus,... Data strobe clock buffer in semiconductor memory apparatus,...

2011-06-28

2011-06-28

Nguyen, Dang T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S193000, C365S233100

Reexamination Certificate

active

07969792

ABSTRACT:
A data strobe clock buffer of a semiconductor memory apparatus includes a buffering block configured to buffer an external data strobe clock signal in response to a buffer enable signal to generate an internal data strobe clock signal, a timing discriminating block configured to discriminate toggle timing of the internal data strobe clock signal in response to a burst start signal and a burst length signal to generate a timing discrimination signal, and an enable controlling block configured to generate the buffer enable signal in response to the timing discrimination signal.

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patent: 100493477 (2005-05-01), None
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