Static information storage and retrieval – Read/write circuit – Including signal comparison
Patent
1998-03-19
1999-03-30
Dinh, Son T.
Static information storage and retrieval
Read/write circuit
Including signal comparison
36518905, 365194, 365207, G11C 700
Patent
active
058897089
ABSTRACT:
A data reading circuit for a semiconductor memory device which is capable of obtaining a desired characteristic of a high speed latching sense amplifier and by which the circuit is stably operated even when a noise is inputted. The circuit includes a latching sense amplifier and a current mirror type sense amplifier for receiving output data DATA and DATAB from a memory cell array, a signal delay unit for delaying an output signal S0 from the latching sense amplifier, a comparing unit for comparing an output signal DEO from the signal delay unit with an output signal SOM from the current mirror type sense amplifier, a pulse generator for receiving an output signal COM from the comparing unit and outputting a pulse signal DLD, a controller for outputting sense amplifier control signals for driving the current mirror type sense amplifier, and a combination unit for outputting latching sense amplifier control signals for driving the latching sense amplifier.
REFERENCES:
patent: 5696719 (1997-12-01), Baek et al.
patent: 5696724 (1997-12-01), Koh et al.
patent: 5708607 (1998-01-01), Lee et al.
patent: 5740112 (1998-04-01), Tanaka et al.
Dinh Son T.
LG Semicon Co. Ltd.
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