Data read circuit of a memory

Details Data read circuit of a memory Data read circuit of a memory

1996-10-03

1998-01-13

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365207, 36518901, G11C 700

Patent

active

057086079

ABSTRACT:
A data read circuit of a memory includes an inverting unit, a precharging unit, a first amplifying unit, a second amplifying unit, and an output buffer unit. The inverting unit inverts data from a sense amplifier, and the precharging unit precharges a data bus line to Vcc/2. The first amplifying unit receives and amplifies the inverted data, and the second amplifying unit is commonly connected to an input terminal of the first amplifying unit to receive and amplify the signal output from the inverting unit. The output buffer unit receives, inverts and outputs the signal amplified by the first and second amplifying units.

REFERENCES:
patent: 5126974 (1992-06-01), Sasaki et al.
patent: 5563835 (1996-10-01), Oldham

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