Data programming circuit for programmable read only memory devic

Details Data programming circuit for programmable read only memory devic Data programming circuit for programmable read only memory devic

1986-12-17

1988-12-13

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365195, G11C 700

Patent

active

047916125

ABSTRACT:
A programming circuit for a programmable read only memory device receiving a data signal to be programmed including a power supply terminal for receiving a first voltage in a read mode and a second voltage as a programming voltage which is a higher voltage than the first voltage in a program mode; an inverter circuit for converting an amplitude of the data signal in the program mode, the inverter including a load element and a first transistor having a drain connected to the load element and a gate receiving the data signal; and a switching circuit connected between the power source terminal and the load element for supplying the second voltage in the program mode and inhibiting a supply of the first voltage in the read mode.

REFERENCES:
patent: 4366556 (1982-12-01), Kyomasu et al.

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