Data processor with protected non-maskable interrupt

Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt inhibiting or masking

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710266, G06F 946

Patent

active

059875593

ABSTRACT:
An interrupt scheme for a data processor includes an enable field for a non-maskable interrupt (NMI). The field is automatically cleared by the data processor when it services the highest priority interrupt, a RESET. The user can set the field to enable a subsequent NMI but cannot himself clear the NMI. This strategy prevents an NMI from interrupting a RESET service routine.

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