Data pipeline interrupt scheme for preventing data disturbances

Details Data pipeline interrupt scheme for preventing data disturbances Data pipeline interrupt scheme for preventing data disturbances

1999-02-22

2000-03-14

Phan, Trong

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523006, 36523008, 365233, G11C 1604, G11C 800

Patent

active

060381779

ABSTRACT:
A read mask circuit (300) is disclosed. A mask command is shifted through a series of mask latches (308 and 310) to generate the output-enable input (OE.sub.--) of an output driver (306). In synchronism with the mask command, data bits are shifted through a series of data latches (312 and 314) to the data input (DIN) of the output driver (306). To prevent a race condition between the mask command and the data bit that is to be masked (B3), the mask command, when latched in the second-to-last mask latch (308), is used to interrupt the last data latch (314). This prevents the to-be-masked data bit (B3) from being latched in the last data latch (314) and generating an undesirable output data transition by the output driver (306).

REFERENCES:
patent: 5511025 (1996-04-01), Smith et al.
patent: 5835448 (1998-11-01), Ohtani et al.
patent: 5887272 (1999-03-01), Sartore et al.

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