Data-output driver circuit and method

Details Data-output driver circuit and method Data-output driver circuit and method

1998-08-24

2000-06-06

Nelms, David

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365194, 326 83, 326 86, 327108, G11C 700

Patent

active

060727292

ABSTRACT:
A drive circuit includes drive input and output terminals, a supply terminal, a drive transistor, and a drive-control circuit. The drive transistor includes a control terminal, a first transistor terminal coupled to the drive output terminal, and a second transistor terminal coupled to the supply terminal. The drive-control circuit has an input terminal coupled to the drive input terminal and has an output terminal coupled to the control terminal of the drive transistor. The drive-control circuit generates on the control terminal of the drive transistor a signal level that changes at a first rate during a first time period and at a second higher rate during a second time period following the first time period. As a result, when used as a data-output driver, one can adjust the first and second rates and time periods such that the drive circuit meets both the 50-ohm and 50 pf falling-slew-rate ranges specified in the Intel.RTM. PC-100 specification.

REFERENCES:
patent: 4779013 (1988-10-01), Tanaka
patent: 5670894 (1997-09-01), Takaishi et al.
patent: 5805505 (1998-09-01), Zheng et al.
patent: 5903500 (1999-05-01), Tsang et al.

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