Data output device of semiconductor memory device

Details Data output device of semiconductor memory device Data output device of semiconductor memory device

2007-05-01

2007-05-01

Tran, Michael (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S230020

Reexamination Certificate

active

11322078

ABSTRACT:
There is provided a data output device for stably operating in a high frequency circumstance. The data output device includes a selection unit for receiving a second address information signal to directly output or inversely output the received signal as a third address information signal in response to a first address information signal; a pipe output control unit for generating a plurality of pipe output control signals; a plurality of pipe latch units for storing a global data in response to a pipe input control signal and aligning the stored data in response to the first to the third address information signals, thereby outputting the aligned data synchronized by the pipe output control signals; and a data driving unit for outputting the aligned data as an external data in response to a first and a second DLL output clock.

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