Data output circuit and method

Details Data output circuit and method Data output circuit and method

2008-12-24

2011-10-11

Le, Vu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189170

Reexamination Certificate

active

08036046

ABSTRACT:
A data output circuit includes a strobe signal controlling block configured to generate a first delayed strobe signal by delaying a first strobe signal by a certain delay amount, an input/output sense amplifying block configured to amplify first parallel data signals to generate second parallel data signals having the same number of bits as that of the first parallel data signals in response to the first strobe signal and the first delayed strobe signal, a storing block configured to latch the second parallel data signals in response to a second strobe signal and a second delayed strobe signal, and a parallel-to-serial converting block configured to sequentially output the second parallel data signals latched in the storing block, wherein the first strobe signal is used to generate a data signal that is outputted first among the second parallel data signals.

REFERENCES:
patent: 2003/0147299 (2003-08-01), Setogawa
patent: 1020070080455 (2007-08-01), None
patent: 1020080001977 (2008-01-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Apr. 28, 2010.

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