Data output buffer of semiconductor memory device for preventing

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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326 27, 326 83, H03K 1716

Patent

active

054385458

ABSTRACT:
A data output buffer, which includes a data output driver which in turn includes a pull-up circuit (14) operating in response to a first signal and a pull-down circuit (I10) operating in response to a second signal, and a control circuit for sensing a current flowing into the pull-down circuit via a feed-back and controlling the slope of the second signal in accordance with the sensed current. The control circuit includes a sensing circuit (I13) for sensing current flowing into the pull-down circuit upon driving data, and the magnitude of noises generated at the actual ground line (GND.sub.1 +GND.sub.2) due to the current, a voltage adjustment circuit (I14) which operates in response to the output signal of the sensing circuit and thereby adjusts the gate voltage of the pull-down circuit. Thereby, the noises generated in the chip are repressed without affecting the operational speed of the chip.

REFERENCES:
patent: 4985644 (1991-01-01), Okihara
patent: 5059823 (1991-10-01), Ahsanullah
patent: 5151621 (1992-09-01), Goto
patent: 5239211 (1993-08-01), Jinbo
patent: 5815172 (1994-05-01), Reddy

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