Data output buffer capable of controlling data valid window...

Details Data output buffer capable of controlling data valid window... Data output buffer capable of controlling data valid window...

2005-10-04

2005-10-04

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S194000, C365S233100

Reexamination Certificate

active

06952370

ABSTRACT:
The primary objective of the present invention is to provide a data output buffer capable of preventing the phenomenon of a wide data valid window caused from early outputting of the first output data during data output operations. For this purpose, the present invention provides a data output buffer circuit in a semiconductor memory device which includes: a driving part for receiving pull-up and pull-down control signals and driving a data output terminal with a voltage level corresponding to data read from a memory cell; and a controlling part for supplying the driving part with control signals to delay the first output of the read data for a designated delay time, and to cause the output of the driving part to retain high impedance state during the designated delay time.

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patent: 5708609 (1998-01-01), Hoang
patent: 5895960 (1999-04-01), Fritz et al.
patent: 6034916 (2000-03-01), Lee
patent: 6643215 (2003-11-01), Kwak
patent: 05-144944 (1993-06-01), None
patent: 11-250666 (1999-09-01), None
patent: 1020040074901 (2004-08-01), None

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