Data output buffer

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

36518911, 326 57, G11C 1140

Patent

active

055131409

ABSTRACT:
For use in a semiconductor circuit device, a tri-state output buffer responds to a control signal generated in the semiconductor circuit device and a below-ground voltage level at an output terminal to prevent wasted drain and substrate current, and to reduce capacitance at the pull-up node driving the output terminal. The output buffer includes a power supply signal providing at least one voltage level with respect to common, an output terminal, a pull-up node, a pull-down node, a first circuit responding to the control signal by providing a first control voltage on the pull-up node, and a second circuit responding to the control signal by providing a second control voltage on the pull-down The output buffer is designed to respond to a voltage level on the output terminal being at a level substantially below common by preventing current flow from the power supply to the output terminal.

REFERENCES:
patent: 4985644 (1991-01-01), Okihara
patent: 5311076 (1994-05-01), Park

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