Data mask as write-training feedback flag

Details Data mask as write-training feedback flag Data mask as write-training feedback flag

2004-08-03

2008-05-06

Elmore, Stephen C. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C710S052000, C710S058000, C345S563000, C345S626000

Reexamination Certificate

active

07370170

ABSTRACT:
Methods and apparatuses that enable memory devices to inform graphical processing systems about the results of WRITE de-skew training. A WRITE-TRAINING mode is added to a memory device. When the WRITE-TRAINING mode is asserted the memory data mask (DM) pin is converted to an output port. Incoming WRITE data is strobed-into the memory device and the resulting data pattern is compared to a desired pattern. If the incoming WRITE data and strobed-in data match, that result is sent to the graphical processing system by setting the DM pin HIGH. If the incoming WRITE data and the strobed-in data do not match, that result is sent to the graphical processing system by setting the DM pin LOW. Beneficially, the incoming data and the desired pattern are derived from pseudo random bit sequence (PRBS) sources.

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patent: 2002/0034119 (2002-03-01), Lee et al.
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Logic and Computer Design Fundamentals, M. Morris Mano and Charles R. Kime, Prentice-Hall Inc., New Jersey, 1997, pp. 360-361, sections 8-1 and 8-2.

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