Data latch circuit device with flip-flop of semi-conductor memor

Details Data latch circuit device with flip-flop of semi-conductor memor Data latch circuit device with flip-flop of semi-conductor memor

1998-02-19

1999-03-30

Nelms, David

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365233, 327143, G11C 1604

Patent

active

058897097

ABSTRACT:
A data latch circuit device consists of synchronous dynamic random access memory, in which it causes number of elements and bus line wiring to reduce to be prevented floating state of DFF circuit in stand-by state at the time putting power supply to work. In the data latch circuit device, there is provided transfer gates for switching so as to supply pulse signal PC to clock signal CK instead of clock signal CLK within active period of the reset signal in answer to provision of the reset signal RP.

REFERENCES:
patent: 5559458 (1996-09-01), Holler, Jr.
patent: 5801561 (1998-09-01), Wong et al.

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