Data latch circuit and semiconductor device using the same

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S193000

Reexamination Certificate

active

11131095

ABSTRACT:
There is provided a data latch circuit that comprises a first buffer for buffering an input data signal in synchronization with an input strobe signal, a first latch unit for conducting a switching operation in response to the strobe signal and latching an output signal from the first buffer for a preset time, a second buffer for buffering an output signal from the first latch unit in synchronization with the strobe signal, and a second latch unit for performing a switching operation in response to the strobe signal and latching an output signal from the second buffer. Further, the present invention provides a semiconductor device using the data latch circuit.

REFERENCES:
patent: 5835444 (1998-11-01), Kim et al.
patent: 5923595 (1999-07-01), Kim
patent: 6484231 (2002-11-01), Kim
patent: 6504767 (2003-01-01), Brown
patent: 6657908 (2003-12-01), Yoon et al.
patent: 10-188553 (1998-07-01), None
patent: 1000-195259 (2000-07-01), None
patent: 2001-035154 (2001-02-01), None

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