Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2006-12-12
2006-12-12
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189090, C365S205000, C365S230080
Reexamination Certificate
active
07149128
ABSTRACT:
A high-speed latch includes a latch unit and a first current source. The latch unit has a first input terminal for receiving a first input signal and a first output terminal for outputting a first output signal. The first current source is coupled to the first output terminal, and is enabled for providing the first output terminal with a first driving current to reduce a voltage difference between the first output signal and the first input signal when the first output signal and the first input signal correspond to different logic states.
REFERENCES:
patent: 5056064 (1991-10-01), Iwahashi et al.
patent: 5740115 (1998-04-01), Ishibashi et al.
patent: 6327203 (2001-12-01), Won
Kang Han-Chang
Razavi Behzad
Hsu Winston
Nguyen Tuan T.
Realtek Semiconductor Corp.
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