Data inversion circuit and semiconductor device

Details Data inversion circuit and semiconductor device Data inversion circuit and semiconductor device

2006-02-14

2006-02-14

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S220000

Reexamination Certificate

active

06999352

ABSTRACT:
A parallel data outputting circuit equipped with a data inversion function, comprises P number of data comparator means, P number of majority decision circuits, P number of inversion flag generating means and P number of data inversion circuits, these being activated in parallel in one cycle. In generating an inversion flag indicating whether or not the parallel data are to be inverted and output in the inverted state, inversion flags are calculated from outputs of the inversion flag generating means and the inversion flag generating means of a cycle directly previous to a current cycle.

REFERENCES:
patent: 6348915 (2002-02-01), Yamashita et al.
patent: 7-20973 (1995-01-01), None
patent: 8-101813 (1996-04-01), None
patent: 10-198475 (1998-07-01), None

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