Data input/output circuit for performing high speed memory data

Details Data input/output circuit for performing high speed memory data Data input/output circuit for performing high speed memory data

1997-04-04

1998-06-02

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Multiplexing

36518903, 36518905, 36518904, 365205, G11C 1300

Patent

active

057611319

ABSTRACT:
A data input/output circuit used to program the cells of a memory array or to determine the state of those cells. The circuit includes a data write path used for programming the memory cells in the array and a data read path for reading data indicative of the state of the cells. The data write path includes switching means for electrically disconnecting the high capacitance elements of the write path from the read path. The switching means is under the control of a control means which acts to enable or disable the switching means. The switching means serves to electrically isolate the high capacitance elements of the write path from the read path, thereby increasing the speed with which a read operation be performed.

REFERENCES:
patent: 4041333 (1977-08-01), Porat
patent: 5043945 (1991-08-01), Bader
patent: 5220532 (1993-06-01), Kertis
patent: 5619461 (1997-04-01), Roohparvar
patent: 5629637 (1997-05-01), Trimberger et al.
patent: 5663908 (1997-09-01), Poohparvar
patent: 5687115 (1997-11-01), Wong et al.

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