Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1999-04-26
2000-11-28
Nelms, David
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365233, 365207, G11C 1604
Patent
active
061543942
ABSTRACT:
The input-output terminal of a semiconductor memory is provided with a data input-output circuit for making it possible to improve the speed of the data input-output by synchronizing the data outputting operation and the Hi-Z control of an output buffer. The data input-output circuit comprises a temporary data storage circuit for temporarily storing data as input and outputting the data as input, an output buffer connected between the temporary data storage circuit and the input-output terminal of the semiconductor data storage device, and an output control circuit for outputting data to the temporary data storage circuit in order to control an output of the output buffer to a high impedance state when the output buffer and the input-output terminal are separated. A differential amplifier connected to the temporary data storage circuit may be provided in place of the output control circuit for performing the Hi-Z control by precharging or discharging.
REFERENCES:
patent: 5043944 (1991-08-01), Nakamura et al.
patent: 5488581 (1996-01-01), Nagao et al.
patent: 5691942 (1997-11-01), Inoue
patent: 5959900 (1999-09-01), Matsubara
Ho Hoai V.
Kabushiki Kaisha Toshipa
Nelms David
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