Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2011-07-12
2011-07-12
Nguyen, Dang T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S222000, C365S230030
Reexamination Certificate
active
07978535
ABSTRACT:
A first timing control unit controls an active timing of a first control signal to output a first driving control signal. A first data input/output unit transmits write data from a data input/output buffer to a global input/output line or transmits read data from the global input/output line to the data input/output buffer, in response to the first driving control signal. A second timing control unit controls an active timing of a second control signal to output a second driving control signal. A second data input/output unit transmits the write data from the global input/output line to a local input/output line or transmits the read data from the local input/output line to the global input/output line, in response to the second driving control signal.
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Hynix / Semiconductor Inc.
Kaminski Jeffri A.
Nguyen Dang T
Venable LLP
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