Data input/output circuit and method of semiconductor memory...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S222000, C365S230030

Reexamination Certificate

active

07978535

ABSTRACT:
A first timing control unit controls an active timing of a first control signal to output a first driving control signal. A first data input/output unit transmits write data from a data input/output buffer to a global input/output line or transmits read data from the global input/output line to the data input/output buffer, in response to the first driving control signal. A second timing control unit controls an active timing of a second control signal to output a second driving control signal. A second data input/output unit transmits the write data from the global input/output line to a local input/output line or transmits the read data from the local input/output line to the global input/output line, in response to the second driving control signal.

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patent: 2006048914 (2006-02-01), None
patent: 10-0390820 (2003-06-01), None
patent: 10-0537205 (2005-12-01), None

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