Data input circuit and semiconductor memory device including...

Details Data input circuit and semiconductor memory device including... Data input circuit and semiconductor memory device including...

2011-01-25

2011-01-25

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S230030

Reexamination Certificate

active

07876624

ABSTRACT:
A semiconductor memory device capable of reducing a whole area thereof includes a plurality of data input circuits configured to reflect inversion information on data inputted thereto, a plurality of global lines for transferring data outputted from the plurality of data input circuits, and a plurality of memory banks for storing data transferred from the plurality of global lines.

REFERENCES:
patent: 5629983 (1997-05-01), Fujimoto
patent: 1020010004210 (2001-01-01), None
patent: 1020060105924 (2006-10-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Mar. 29, 2010.
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Sep. 30, 2009 with an English Translation.

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