Data extraction/insertion method and device in digital...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Reexamination Certificate

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C341S060000, C341S067000, C711S201000, C711S214000, C711S217000, C712S034000, C712S300000

Reexamination Certificate

active

06950922

ABSTRACT:
A data extraction/insertion device in a digital signal processor and a method thereof are provided. The data extraction/insertion method is performed in a digital signal processor including a source register and a destination registr. In this digital signal processor, data is extracted from the source register and inserted into the destination register using a position value, which represents the reference position of data extraction, and an offset value, which represents the size of data to be extracted. Accordingly, a sequence of data packets, the size of which are given in neither byte nor word unit, are effectively extracted or inserted, thus saving the space of a memory.

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“DSP Data Memory Layouts Optimized for Intermediate Address Pointer Updates,” Wess et al, Circuits and Systems, 1998, IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on, Nov. 24-27, 1998, pp. 451-454.

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