Data determining circuitry and data determining method

Details Data determining circuitry and data determining method Data determining circuitry and data determining method

1998-06-19

1999-03-23

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518909, 327 55, 327 57, G11C 700

Patent

active

058869310

ABSTRACT:
Feedback control is performed on the potential of a bit line in accordance with a change in the potential. Meanwhile, the data which has been previously read on the bit line is temporarily latched in a D-type flip-flop. A reference voltage Vref determined by a bias circuit is offset by using an offset circuit while referring to the level of the previously read data latched in the D-type flip-flop. In this manner, a bias voltage is obtained from currently read data, and based on the bias voltage, the potential of the bit line is controlled. Thus, high-speed data determining operation is achieved, which has been previously hampered when the currently read data is reversed with respect to the data read in the previous cycle.

REFERENCES:
patent: 4348601 (1982-09-01), Kitamura
patent: 4845675 (1989-07-01), Krenik et al.
patent: 5063304 (1991-11-01), Iyengar
patent: 5719810 (1998-02-01), Lee et al.
patent: 5793680 (1998-08-01), Okajima

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