Data cache fast address calculation system and method

Details Data cache fast address calculation system and method Data cache fast address calculation system and method

1995-12-07

1999-01-12

Robertson, David L.

Electrical computers and digital processing systems: memory

Address formation

Generating prefetch, look-ahead, jump, or predictive address

711220, G06F 1200

Patent

active

058601511

ABSTRACT:
The data cache features an improved mechanism for accessing data from the data memory array of a data cache, by generating a predicted address and using it to access the data cache array in parallel with the effective address computation. The logic circuitry consists of elements which are capable of performing a carry-free addition (logical or arithmetic) of a predetermined number of base register address bits with the same number of offset register address bits. Methods to generate and verify the predicted index are also provided.

REFERENCES:
patent: 5335333 (1994-08-01), Hinton et al.
patent: 5386523 (1995-01-01), Crook et al.
patent: 5584000 (1996-12-01), Benschop et al.
patent: 5649143 (1997-07-01), Parady

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