Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-03-28
2006-03-28
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S107000, C710S110000, C710S240000, C710S306000
Reexamination Certificate
active
07020733
ABSTRACT:
A data bus system, capable of distributing devices including first and second data buses capable of transmitting data among a plurality of devices; a register block that stores information on a first bus request signal and a first bus grant signal; a global arbiter that receives the first bus request signal from the register block to output a second bus request signal and receives a second bus grant signal from the register block to output the first bus grant signal. A bilateral bridge that acts as a data transmission path between the first data bus and the second data bus; and a local arbiter exists in each first and second data bus, and receives the second bus request signal from the global arbiter to output the second bus grant signal is disclosed.
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Jang Woo-Hyuk
Kim Jae-Hun
Harness & Dickey & Pierce P.L.C.
Misiura Brian
Perveen Rehana
Samsung Electronics Co,. Ltd.
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