Static information storage and retrieval – Read/write circuit – Precharge
Patent
1983-04-11
1985-11-05
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Precharge
G11C 1140
Patent
active
045518211
ABSTRACT:
A data bus precharging circuit has: a charging circuit for charging a common data bus in response to a precharge control signal, the common data bus having a plurality of bit lines; a precharge sensing circuit for generating a reset signal when all of the bit lines of the data bus are charged; and a control signal generating circuit for the charging circuit to charge the data bus when a precharge clock signal is inputted to the control signal generating circuit, and for disabling the charging circuit from charging the data bus when the reset signal is inputted to the control signal generating circuit from the precharge sensing circuit.
REFERENCES:
patent: 4131951 (1978-12-01), Asahi
Iketani Ryuichi
Yokouchi Hiroshi
OKI Electric Industry Co., Ltd.
Popek Joseph A.
LandOfFree
Data bus precharging circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data bus precharging circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data bus precharging circuits will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-299417