Data arrangement control signal generator for use in...

Details Data arrangement control signal generator for use in... Data arrangement control signal generator for use in...

2004-12-30

2008-08-12

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S193000, C365S194000, C365S233100

Reexamination Certificate

active

07411842

ABSTRACT:
A data arrangement control signal generation circuit for use in a semiconductor memory device includes a plurality of data arrangement control signal generation units connected in series, each for selectively generating a data arrangement control signal according to a column address strobe (CAS) latency.

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patent: 6205062 (2001-03-01), Kim et al.
patent: 6453381 (2002-09-01), Yuan et al.
patent: 6687181 (2004-02-01), Usuki et al.
patent: 2002/0196662 (2002-12-01), Pascucci
patent: 2000-0044591 (2000-07-01), None
patent: 2001-0048248 (2001-06-01), None
patent: 2003-0080313 (2003-10-01), None

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