Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2011-08-09
2011-08-09
Wang, Ted M (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S372000, C710S008000, C710S022000
Reexamination Certificate
active
07995695
ABSTRACT:
In an exemplary embodiment, a data alignment system comprises a First-In First-Out register (FIFO), a programmable pattern generator connected to the FIFO, and a controller connected to the programmable pattern generator and the FIFO. The FIFO is configured to provide data to or receive data from a first data lane of a serial data link having one or more lanes. Each data lane of the serial data link is configured to transmit a respective serial data stream. The programmable pattern generator is configured to generate a plurality of alignment symbols. The controller is configured to manage the alignment of the one or more data lanes of the serial data link and the insertion of a selected one of the plurality of alignment symbols into each of the serial data streams.
REFERENCES:
patent: 7143207 (2006-11-01), Vogt
patent: 7286572 (2007-10-01), Hornbuckle et al.
patent: 2006/0273941 (2006-12-01), Charath et al.
“XAUI/XGXS Proposal,” IEEE 802.3ae Task Force, PowerPoint Presentation Slides 1-26, Ottowa, ON May 23-25, 2000.
Ahmed Yasser
Dai Xingdong
Sindalovsky Vladimir
Smith Lane
Agere Systems Inc.
Wang Ted M
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