Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-03-06
2007-03-06
Kerveros, James C. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
10128134
ABSTRACT:
An alignment module receives a sequence of un-aligned data words, finds a frame alignment word, and aligns the data words based on the position of the frame alignment word in the un-aligned data words. Comparators compare segments of two consecutive un-aligned data words to a frame alignment word and generate a first logic signal when there is a match. A shift register and a counter are used to determine which comparator generates the first logic signal. The counter sends a count to a barrel shifter, which shifts the un-aligned data words according to the count to generate aligned data words.
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Fish & Richardson P.C.
Intel Corporation
Kerveros James C.
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