Data access target predictions in a data processing system

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address

Reexamination Certificate

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Details

C711S168000, C712S233000, C712S237000, C712S239000

Reexamination Certificate

active

07900019

ABSTRACT:
A data processing apparatus having a plurality of memories is provided in which address generation logic (109) outputs to at least one of the plurality of memories a target memory address corresponding to the data to be accessed. Target memory prediction logic (113) outputs a prediction indicating in which one of the plurality of memories a target data is stored. The target memory prediction logic (113) outputs the prediction in the same processing cycle as the output of the target memory address by the address generation logic (109). An associated method is also provided.

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