Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-11-27
2007-11-27
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000, C438S637000, C438S672000, C257SE21577
Reexamination Certificate
active
11394011
ABSTRACT:
A method is provided of fabricating a damascene interconnection. The method begins by forming on a substrate a first dielectric layer, a capping layer on the first dielectric sublayer and a resist pattern over the capping layer to define a first interconnect opening. The capping layer and the dielectric layer are etched through the resist pattern to form the first interconnect opening. The resist pattern is removed and a barrier layer is applied over the capping layer and in the first interconnect opening. An interconnection is formed by filling the first interconnect opening with conductive material. The interconnection is planarized to remove excess material and a portion of the first dielectric layer damaged by the planarizing step is selectively etched. A second dielectric layer is applied to replace the damaged portion of the first dielectric.
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Fukasawa Masanaga
Nogami Takeshi
Lebentritt Michael
Lee Cheung
Mayer & Williams P.C.
Mayer, Esq. Stuart M.
Sony Electronics Inc.
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