Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2007-08-21
2007-08-21
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S762000
Reexamination Certificate
active
11004767
ABSTRACT:
A method of forming an integrated circuit interconnect structure is presented. A first conductive line is formed over a semiconductor substrate. A conductive cap layer is formed on the first conductive line to improve device reliability. An etch stop layer (ESL) is formed on the conductive cap layer. An inter-level dielectric (IMD) is formed on the ESL. A via opening and a trench are formed in the ESL, IMD, and conductive cap layer. A recess is formed in the first conductive line. The recess can be formed by over etching when the first dielectric is etched, or by a separate process such as argon sputtering. A second conductive line is formed filling the trench, opening and recess.
REFERENCES:
patent: 6130157 (2000-10-01), Liu et al.
patent: 6181013 (2001-01-01), Liu et al.
patent: 6255734 (2001-07-01), Liu et al.
patent: 6869810 (2005-03-01), Joei
patent: 2004/0058547 (2004-03-01), Morrow et al.
patent: 2005/0098892 (2005-05-01), Hu et al.
Ko, T., et al., “High Performance/Reliability Cu Interconnect with Selective CoWP Cap,” 2003 Symposium on VLSI Technology Digest of Technical Papers, pp. 109-110.
Awaya, N., et al., “Self-Aligned Passivation Technology for Copper Interconnection Using Copper-Aluminum Alloy,” Jpn. J. Appl. Phys., vol. 36, Part 1, No. 3B, Mar. 1997, pp. 1548-1553.
Krishnan, A., et al., “Copper Metallization for VLSI Applications,” VMIC Conference, Jun. 9-10, 1992, pp. 226-231.
Colgan, E.G., “Selective CVD-W for Capping Damascene Cu Lines,” Thin Solid Films, 262, 1995, pp. 120-123.
Huang Jui Jen
Ko Ting-Chu
Shue Shau-Lin
Su Hung-Wen
Tsai Minghsing
Prenty Mark V.
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
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