Coating processes – Electrical product produced – Metal coating
Reexamination Certificate
2002-04-08
2004-04-13
Pianalto, Bernard (Department: 1762)
Coating processes
Electrical product produced
Metal coating
C427S250000, C427S255394, C427S255700, C427S331000, C427S402000, C427S404000
Reexamination Certificate
active
06720027
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Embodiments of the present invention generally relate to an apparatus and method of depositing a titanium silicon nitride layer. More particularly, embodiments of the present invention relate to an apparatus and method of depositing a variable content titanium silicon nitride layer by cyclical deposition.
2. Description of the Related Art
Reliably producing sub-micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) of semiconductor devices. However, as the fringes of circuit technology are pressed, the shrinking dimensions of interconnects in VLSI and ULSI technology have placed additional demands on the processing capabilities. The multilevel interconnects that lie at the heart of this technology require precise processing of high aspect ratio features, such as vias and other interconnects. Reliable formation of these interconnects is very important to VLSI and ULSI success and to the continued effort to increase circuit density and quality of individual substrates.
As circuit densities increase, the widths of interconnects, such as vias, trenches, contacts, and other features, as well as the dielectric materials between them, decrease to sub-micron dimensions (e.g., less than 0.20 micrometers or less), whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increase. Many traditional deposition processes have difficulty filling sub-micron structures where the aspect ratio exceeds 4:1. Therefore, there is a great amount of ongoing effort being directed at the formation of substantially void-free and seam-free sub-micron features having high aspect ratios.
Currently, copper and its alloys have become the metals of choice for sub-micron interconnect technology because copper has a lower resistivity than aluminum, (1.7 &mgr;&OHgr;-cm compared to 3.1 &mgr;&OHgr;-cm for aluminum), and a higher current carrying capacity and significantly higher electromigration resistance. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increased device speed. Further, copper has a good thermal conductivity and is available in a highly pure state.
However, one problem with the use of copper is that copper diffuses into silicon, silicon dioxide, and other dielectric materials which may compromise the integrity of devices. Therefore, conformal barrier layers become increasingly important to prevent copper diffusion. Titanium silicon nitride is one material being explored for use as a barrier material to prevent the diffusion of copper into underlying layers. One problem with prior titanium silicon nitride barrier layers is that the silicon in titanium silicon nitride may react with the copper to form copper silicide, which has a high resistance and, thus, increases the resistance of the interconnect.
Therefore, there is a need for an improved barrier layer for use in metallization of interconnects.
SUMMARY OF THE INVENTION
Embodiments of the invention relate to an apparatus and method of depositing a titanium silicon nitride layer by cyclical deposition. In one aspect, a titanium silicon nitride layer having a variable content or a controlled composition of titanium, silicon, and nitrogen through the depth of the layer may be formed. One embodiment of this variable content titanium silicon nitride layer or tuned titanium silicon nitride layer includes a bottom sub-layer of TiSi
X1
N
Y1
, a middle sub-layer of TiSi
X2
N
Y2
, and a top sub-layer of TiSi
X3
N
Y3
in which X1 is less than X2 and X3 is less than X2. Another embodiment of a variable content titanium silicon nitride layer includes a bottom sub-layer of TiSi
X1
N
Y1
and a top sub-layer of TiSi
X2
N
Y2
in which X2 is greater than X1. Still another embodiment of a variable content titanium silicon nitride layer includes a bottom sub-layer of TiSi
X1
N
Y1
, a middle sub-layer of TiSi
X2
N
Y2
, and a top sub-layer of TiSi
X3
N
Y3
in which X1 is greater than X2 and X3 is greater than X2.
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Xi Ming
Yang Michael X.
Applied Materials Inc.
Moser Patterson & Sheridan LLP
Pianalto Bernard
LandOfFree
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