Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-04-27
2002-06-25
Meeks, Timothy (Department: 1762)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S685000, C427S576000, C427S124000, C427S126300, C427S253000, C427S255390, C427S255394, C427S255700
Reexamination Certificate
active
06410432
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the formation of integrated circuits, and specifically to chemical vapor deposition of integrated tantalum and tantalum nitride films deposited from tantalum halide precursors.
BACKGROUND
Integrated circuits (IC) provide the pathways for signal transport in an electrical device. An IC in a device is composed of a number of active transistors contained in a silicon base layer of a semiconductor substrate. To increase the capacity of an IC, large numbers of interconnections with metal “wires” are made between one active transistor in the silicon base of the substrate and another active transistor in the silicon base of the substrate. The interconnections, collectively known as the metal interconnection of a circuit, are made through holes, vias or trenches that are cut into a substrate. The particular point of the metal interconnection which actually makes contact with the silicon base is known as the contact. The remainder of the hole, via or trench is filled with a conductive material, termed a contact plug. As transistor densities continue to increase, forming higher level integrated circuits, the diameter of the contact plug must decrease to allow for the increased number of interconnections, multilevel metalization structures and higher aspect ratio vias.
Aluminum has been the accepted standard for contacts and interconnections in integrated circuits. However, problems with its electromigration and its high electrical resistivity require new materials for newer structures with submicron dimensions. Copper holds promise as the interconnect material for the next generation of integrated circuits in ultra large scale integration (ULSI) circuitry, yet its formation of copper silicide (Cu—Si) compounds at low temperatures and its electromigration through a silicon oxide (SiO
2
) are disadvantages to its use.
As the shift from aluminum to copper as an interconnect element of choice occurs, new materials are required to serve as a barrier, preventing copper diffusion into the underlying dielectric layers of the substrate and to form an effective “glue” layer for subsequent copper deposition. New materials are also required to serve as a liner, adhering subsequently deposited copper to the substrate. The liner must also provide a low electrical resistance interface between copper and the barrier material. Barrier layers that were previously used with aluminum, such as titanium (Ti) and titanium nitride (TiN) barrier layers deposited either by physical vapor deposition (PVD) methods such as sputtering and/or chemical vapor deposition (CVD), are ineffective as barriers to copper. In addition, Ti reacts with copper to form copper titanium (Cu—Ti) compounds at the relatively low temperatures used with PVD and/or CVD.
Sputtered tantalum (Ta) and reactive sputtered tantalum nitride (TaN) have been demonstrated to be good diffusion barriers between copper and a silicon substrate due to their high conductivity, high thermal stability and resistance to diffusion of foreign atoms. However, the deposited Ta and/or TaN film has inherently poor step coverage due to its shadowing effects. Thus the sputtering process is limited to relatively large feature sizes (>0.3 &mgr;m) and small aspect ratio contact vias. CVD offers the inherent advantage over PVD of better conformality, even in small structures (<0.25 &mgr;m) with high aspect ratios. However, CVD of Ta and TaN with metal-organic sources such as tertbutylimidotris(diethylamido) tantalum (TBTDET), pentakis(dimethylamino)tantalum (PDMAT) and pentakis(diethylamino) tantalum (PDEAT) yields mixed results. Additional problems with Ta and TaN are that all resulting films have relatively high concentrations of oxygen and carbon impurities and require the use of a carrier gas.
The need to use a carrier gas presents the disadvantage that the concentration of the precursor gas in the carrier is not precisely known. As a result, accurate metering of a mixture of a carrier gas and a precursor gas to the CVD reaction chamber does not insure accurate metering of the precursor gas alone to the reactor. This can cause the reactants in the CVD chamber to be either too rich or too lean. The use of a carrier gas also presents the disadvantage that particulates are frequently picked up by the flowing carrier gas and delivered as contaminants to the CVD reaction chamber. Particulates on the surface of a semiconductor wafer during processing can result in the production of defective semiconductor devices.
Thus, a process to deposit Ta/TaN integrated bilayers at low temperatures (<500° C.) implementing an inorganic source of tantalum, such as tantalum pentahalide, would provide an advantage in the formation of copper barriers in the next generation of IC. Ideally, the deposited film will have a high step coverage (the ratio of the coating thickness at the bottom of a feature to the thickness on the sides of a feature or on the top surface of the substrate or wafer adjacent the feature), good diffusion barrier properties, minimal impurities, low resistivity, good conformality (even coverage of complex topography of high aspect ratio features) and ideally the process will have a high deposition rate.
SUMMARY OF THE INVENTION
The invention is directed to a method of providing an integrated tantalum (Ta)/tantalum nitride (TaN
x
) film from a tantalum halide precursor on a substrate by chemical vapor deposition. The tantalum halide precursor is delivered at a temperature sufficient to vaporize the precursor to provide a vaporization pressure to deliver the tantalum vapor to a reaction chamber containing the substrate. The vaporization pressure is greater than about 3 Torr. Ta is combined with a process gas and is deposited on the substrate by a plasma enhanced CVD (PECVD) process at a pressure in the range of 0.2-5.0 Torr. The vapor is then combined with a process gas containing nitrogen and TaN
x
is deposited by either a PECVD or thermal CVD method. Both the Ta and TaN
x
layers are deposited in the same chamber, thus increasing the efficiency of the method. The tantalum halide precursor is tantalum fluoride (TaF), tantalum chloride (TaCl) or tantalum bromide (TaBr), preferably tantalum pentafluoride (TaF
5
), tantalum pentachloride (TaCl
5
) or tantalum pentabromide (TaBr
5
). The substrate temperature is in the range of about 300° C.-500° C.
The invention is also directed to a method of depositing an integrated Ta/TaN
x
film from a TaF
5
or TaCl
5
precursor on a substrate by elevating the precursor temperature sufficient to vaporize the precursor. The vapor is combined with a process gas and a Ta film is deposited by PECVD. The vapor is then combined with a process gas containing nitrogen and the TaN
x
film is deposited by PECVD or thermal CVD.
The invention is further directed to method of depositing a Ta/TaN
x
integrated film from a TaBr
5
precursor on a substrate without a carrier gas. The temperature of the precursor is elevated sufficient to produce a tantalum vapor. The vapor is combined with a process gas and Ta is deposited by PECVD then the vapor is combined with a process gas containing nitrogen and the TaN
x
film is deposited on the substrate by PECVD or thermal CVD.
The invention is still further directed to a substrate integral with a copper (Cu) layer and an integrated Ta/TaN
x
layer in which diffusion of copper is prevented by the integrated Ta/TaN
x
layer.
The integrated Ta/TaN
x
film deposited according to the invention has minimal impurities and low resistivity. The film provides good step coverage, good conformality even in small high aspect ratio features and is a good diffusion barrier to a copper film.
It will be appreciated that the disclosed method and substrates of the invention have an array of applications. These and other advantages will be further understood with reference to the following drawings and detailed description.
REFERENCES:
patent: 2604395 (1952-07-01), Gonser et al.
patent: 4535000 (1985-08-01), Gordon
patent: 4678769 (1987-07-01), King
patent: 4859617 (1
Hautala John J.
Westendorp Johannes F. M.
Meeks Timothy
Tokyo Electron Limited
LandOfFree
CVD of integrated Ta and TaNx films from tantalum halide... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with CVD of integrated Ta and TaNx films from tantalum halide..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CVD of integrated Ta and TaNx films from tantalum halide... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2898509