Current-mirror-biased pre-charged logic circuit

Details Current-mirror-biased pre-charged logic circuit Current-mirror-biased pre-charged logic circuit

1987-10-29

1989-01-10

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307448, H03K 1716, H03K 19017, H03K 19094

Patent

active

047975806

ABSTRACT:
Current-mirror circuitry is utilized on a MOS integrated circuit for regulating the amount of current entering the pre-charged nodes of a pre-charged logic circuit. The current-mirror circuitry involves a series of bias transistors, each extending in parallel with a respective one of the pre-charge transistors, and a bias current circuit. The bias current circuit is formed by a transistor and a resistance element which are serially connected across the power supply of the logic circuit. The gate of the bias circuit transistor is connected to the gates of the bias transistors, and the current passing through each bias transistor depends upon the relative dimensions between that transistor and the respective bias circuit transistor. The value of the resistance element determines the amount of current passing through the bias circuit transistor and therefore through the bias transistors.

REFERENCES:
patent: 3942778 (1976-03-01), Hsiao et al.
patent: 4051392 (1977-09-01), Rosenthal et al.
patent: 4442398 (1984-04-01), Bertails et al.

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