Current limit circuit and semiconductor memory device

Details Current limit circuit and semiconductor memory device Current limit circuit and semiconductor memory device

2006-07-11

2009-12-15

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S205000

Reexamination Certificate

active

07633820

ABSTRACT:
A current limit circuit comprising: a current limit element for limiting an output current level to within a predetermined range of a limiting current and including a first PMOS transistor having a source to which a predetermined voltage is applied and a drain through which the output current is supplied; and a gate voltage generating circuit for generating a gate voltage by a feedback control such that a difference between the predetermined voltage and a gate voltage of the first PMOS transistor coincides with a threshold voltage of a second PMOS transistor having approximately the same characteristic as that of the first PMOS transistor in a state in which a predetermined current is flowing through the second PMOS transistor.

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