Current controlled field effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C257S200000, C257S321000, C257S318000, C257S345000

Reexamination Certificate

active

06630382

ABSTRACT:

FIELD OF THE INVENTION
The invention generally relates to electronic devices such as transistors. Various aspects of the present invention include methods and devices relating to field effect transistors that may be controlled by gate currents.
BACKGROUND OF THE INVENTION
Electronic devices such as diodes, transistors and the like are commonly used in many items found in homes, offices, vehicles, personal electronics, industrial and aerospace applications, medical devices and elsewhere. Generally speaking, a transistor is a three-terminal device that provides, for example, amplification or switching capabilities in analog and digital circuits. Recently, efforts have been focused upon creating transistors that perform various functions with reduced power consumption. Reduced power consumption is particularly desirable in applications that require batteries that may need to be replaced when power is expended. In medical devices (such as pacemakers), satellite devices, and other applications, battery replacement can be extremely inconvenient, so the need for so-called “micropower” components is increased. In addition, low power devices are typically preferred for ultra-large-scale-integration (ULSI) circuits, which frequently require low power devices to minimize total power dissipation.
Various forms of transistors are shown in FIG.
1
. Such transistors generally fall into one of two categories corresponding to field effect transistors (FETs) and bipolar junction transistors (BJTs). Generally speaking, FETs operate in response to a voltage applied at a gate terminal that suitably controls a depletion region that affects current flow in a semiconducting channel. BJTs are typically characterized by a joining of two P-N junctions, as best seen in FIG.
1
(
c).
Presently, the majority of “standard” transistor devices used in microprocessor and other digital applications are complementary metal oxide semiconductor FETs (CMOS) operating in a strong inversion regime where input voltage, V
gs
, is greater than a threshold voltage V
th
In such transistors the current flowing in a semiconducting channel (drain current, I
d
) typically varies as (V
gs
−V
th
)
2
. V
th
for such devices may be around 0.7 V and current flow in the channel may be in the milli-amp range. A biasing configuration of an exemplary strongly inverted n-channel prior art MOSFET device is shown by FIG.
1
(
a).
For applications requiring minimal current flow, CMOS based circuits may be biased as so-called “sub-threshold MOSFETs” operating in a weak inversion regime where gate-source voltage V
gs
is less than V
th
. FIG.
1
(
b
) shows exemplary biasing conditions for a weakly inverted n-channel MOSFET. Under these conditions the MOSFET drain current, I
d
, typically varies in the picoamp to microamp range and is given by
I
d
=
μ



C
OX

W
L


(
V
gs
-
V
th
)
/
U
T

(
1
-

-
V
ds
/
U
T
)
(
1
)
where U
T
=kT/e, which may be about 25.8 mV at room temperature, &mgr; is the carrier mobility, C
ox
is the oxide capacitance and W/L is the width-to-length ratio of the transistor.
The low drain currents and small voltage required for drain current saturation (e.g. V
d
sat
≧3U
T
~75 mV) of devices operating in the weak inversion regime makes sub-threshold operation ideal for micropower circuit applications such as pocket calculators, pagers, medical implants, ULSI logic etc.. The main disadvantage of such devices, however, is low speed. Cut-off frequency in the weak inversion regime is typically given by f
T
=&mgr;U
T
/2&pgr;L
g
2
. For a weakly inverted NMOS device &mgr; is on the order of 200 cm
2
/Vs and for L
g
=3 &mgr;m, creating an operating frequency of about 9 MHz, although stable operation generally takes place at much lower frequencies (e.g. on the order of about 200-500 kHz).
A distinction between transistors operating in the weak inversion or weak accumulation regime (as opposed to the strong inversion or strong accumulation regime) is that the drain current in the weak inversion or weak accumulation operating regime typically varies exponentially with the difference between the gate-source voltage and the threshold voltage (e.g. V
gs
-V
th
). Small variations in V
th
therefore typically produce large variations in I
d
because of the exponential nature of equation 1. Attempting to improve the speed f
T
of micropower devices by reducing gate length L
g
, then, is not typically practical because of difficulties in precisely matching threshold voltages V
th
between devices. For this reason many micropower circuits typically have undesirably long gates (e.g. L
g
≧1 &mgr;m) and typically operate below 1 MHz.
Controlling a transistor with an input bias current has been used with various BJT devices wherein collector current I
c
may be expressed as exp(V
be
/U
T
). It is generally impractical to use base-emitter voltage, V
be
, to control I
c
due to the exponential dependency of current (I
c
) on base-emitter voltage (V
be
). Rather than using base-emitter voltage, many BJTs use input base current, I
b
, to control I
c
via the current gain &bgr;, i.e. I
c
=&bgr;I
b
. Such control via current bias configuration for an exemplary NPN BJT is shown in FIG.
1
(
c).
In principal, prior art BJT devices could be used in the micropower regime by applying a sufficiently small base current to ensure that I
c
is in the picoamp to microamp range. However, because BJTs are generally minority carrier devices, charging the input diffusion capacitance (i.e. C
diff
of the forward biased base-emitter junction) takes an undesirable amount of time, thus causing the cut-off frequency to be undesirably small. BJTs typically are not used as a micropower device at high frequencies.
An alternate prior art transistor configuration is the metal-semiconductor FET or MESFET. MESFETs are typically used as depletion mode devices (i.e. the channel is conducting for V
gs
=0) and may be switched off by applying a reverse bias voltage to the Schottky gate input. To make this kind of depletion mode MESFET, the active channel layer is generally relatively thick and relatively heavily doped such that the depletion region under the gate is smaller than the channel thickness for V
gs
=0. A typical biasing configuration for an n-channel MESFET is shown in
FIG. 1
d.
Referring to
FIG. 1
d
, for an n-channel depletion mode MESFET, the threshold voltage V
th
is typically less than zero and the gate voltage is varied in the range V
th
<V
gs
<0 to control the drain current, which varies as some small power of the difference between the gate-source voltage and the threshold voltage (e.g. V
gs
−V
th
). In this configuration the current flowing into the gate is that due to a reverse-biased Schottky junction. In many devices, the gate current is designed to be negligibly small compared to the drain current. The gate current typically plays no role in the control of the drain current other than to establish the gate voltage. Stated another way, gate current in such MESFETs is typically a mere ‘leakage’ current that is generally intended to be kept to the lowest possible levels.
Enhancement-mode MESFETs have also been created such that the depletion region extends across the active channel layer at V
gs
=0 as shown in FIG.
2
. The transistor is switched on by applying a forward bias voltage to the gate such that the depletion region extends across only a part of the semiconducting channel. The voltage applied to the gate, however, typically has to be kept low enough such that the gate input current is much less than the drain current. Once again, the gate current typically plays no role in the control of the drain current other than to establish a gate voltage. As such, drain current I
d
is controlled by the gate voltage and varies as some small power of (V
gs
−V
th
). In this configuration the transistor is generally considered to be conducting when the gate-source voltage is greater than the threshold voltage (i.e. when V
gs
>V
th
).

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