Cross-point memory architecture with improved selectivity

Details Cross-point memory architecture with improved selectivity Cross-point memory architecture with improved selectivity

2006-05-16

2006-05-16

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S202000

Reexamination Certificate

active

07046550

ABSTRACT:
A cross-point memory includes a plurality of memory cells, a plurality of global word lines, a plurality of local word lines, and a plurality of global bit lines. At least a given one of the global word lines is configurable for conveying a write current for selectively writing a logical state of one or more of the memory cells. Each of the local word lines is connected to at least one of the memory cells for assisting in writing a logical state of the at least one memory cell corresponding thereto. Each of the global bit lines is connected to at least one of the memory cells for writing a logical state of the memory cell corresponding thereto. The memory further includes a plurality of selection circuits, each of the selection circuits being operative to electrically connect a given one of the local word lines to a given one of the global word lines in response to a control signal applied thereto. During a write operation directed to at least one selected memory cell, the write current passes through the selected memory cell for writing the logical state of the selected memory cell.

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