CPU core to bus speed ratio detection

Details CPU core to bus speed ratio detection CPU core to bus speed ratio detection

1996-02-23

1999-08-10

Butler, Dennis M.

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

713500, G06F 104

Patent

active

059352558

ABSTRACT:
A mechanism for determining a CPU's core-to-bus frequency ratio in a computer system using the CPU itself, rather than an external agent, to sample the external pins on RESET and latch their core/bus frequency ratio information into an internal register. By accessing the information in this internal register, it is possible for the BIOS or any other software to read the internal to external clock ratios and optimize the performance of the system.

REFERENCES:
patent: 5459855 (1995-10-01), Lelm
patent: 5471587 (1995-11-01), Fernando
patent: 5630107 (1997-05-01), Caemean et al.

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